Electronic digital systems are commonly constructed with a number of separate modules that are supplied by a single synchronous master clock. Many newer system architectures are configured around a basic set of standard complex modules. These standard modules are combined in different ways to meet specific system objectives (e.g., one system may have only one processor, while another may have many processors performing different tasks. While it is possible to generate the clock on a separate clock module, this would require the utilization of a module slot in the chassis simply for the clock.
A single synchronous clock is an essential feature in many electronic digital systems. Such a system may consist of few modules, (e.g., a processor with a memory module and an input/output module) or it may consist of many modules. In a multiple module electronic system, it is highly desirable to be able to remove any module in the system and to have the system to continue to operate, and a single clock source would obviously not meet this limitation. Another requirement for many implementations is that the number of back panel pins employed must be minimized. The present invention provides a redundant clock system consisting of two clock circuits each of which may be activated which require only two pins for control. Other modules may also contain clock circuits that are disabled in systems where they are not required.